Key Selection Information
| Selection Parameter | Confirmed Information |
|---|---|
| Topology | Single-channel low-side driver |
| Peak Drive | 4 A source / 4 A sink |
| Supply | 4.5 V to 18 V |
| Delay | 13 ns typical propagation delay |
| Inputs | Dual-input structure supports flexible logic control |
| Logic | TTL/CMOS compatible thresholds with hysteresis |
| UVLO | Output held low during VDD UVLO |
| Exact Package / Packing | SOT-23 (DBV), 5 pins; 3000-piece large tape and reel |
Product Overview
UCC27517DBVR is a compact symmetrical 4 A/4 A low-side gate driver for MOSFET and IGBT switching. Unlike UCC27511, it uses one output pin rather than split source/sink outputs and provides balanced turn-on/turn-off peak current.
The 13 ns typical propagation delay and 4.5–18 V supply range make it useful in high-frequency power conversion when the design does not need the stronger 8 A sink or separate gate-resistor paths of UCC27511.
The DBVR exact option is SOT-23-5, 3000-piece large reel, so board footprint and pin count are both smaller than the six-pin split-output device.
For related devices, see HKEQGOO’s Gate Drivers category.

Technical Specifications
| Parameter | Verified Information |
|---|---|
| Manufacturer | Texas Instruments |
| Exact MPN | UCC27517DBVR |
| Topology | Single-channel low-side driver |
| Peak Drive | 4 A source / 4 A sink |
| Supply | 4.5 V to 18 V |
| Delay | 13 ns typical propagation delay |
| Inputs | Dual-input structure supports flexible logic control |
| Logic | TTL/CMOS compatible thresholds with hysteresis |
| UVLO | Output held low during VDD UVLO |
| Exact Package / Packing | SOT-23 (DBV), 5 pins; 3000-piece large tape and reel |
| Manufacturer Status | Active / Production |
| Part Marking | 7517 |
Functional Highlights
Balanced 4 A drive suits symmetric gate-charge requirements
When turn-on and turn-off rates can use one gate path/resistor strategy, the simpler output reduces pin count and routing complexity.
Dual-input logic can implement polarity/enable behavior without extra glue logic
The two-input structure should still be checked against the exact truth table so unused pins are tied to deterministic levels.
Design Considerations
- Calculate peak gate current from gate charge and target transition time rather than assuming 4 A flows for the full edge.
- Use local bypassing and a short return path to prevent package/trace inductance from creating false gate voltage.
- Tie unused logic input to the recommended level; do not leave a gate-control input floating.
Product Status and Exact Order Code
Manufacturer status: Active / Production
Texas Instruments lists UCC27517DBVR as Active / Production; SOT-23 (DBV), 5 pins; 3000-piece large tape and reel; Level-1-260C-UNLIM; −40°C to +140°C; marking 7517.
Related Engineering Resources
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