Key Selection Information
| Selection Parameter | Confirmed Information |
|---|---|
| Channels | 8 bidirectional channels |
| Direction | No DIR pin |
| Low-Side Domain | Supports low-voltage translation beginning around 0.65 V in stated configurations |
| High-Side Domain | Up to 5-V logic translation |
| Speed | Up to 100-MHz-class under low-capacitance stated conditions; load dependent |
| Enable | High impedance when EN is low |
| Use | GPIO, MDIO, PMBus, SMBus, SDIO, UART, I²C and similar interfaces |
| Exact Package / Packing | TSSOP (PW), 20 pins; 2000-piece large reel; −40°C to +125°C; marking LSF0108 |
Product Overview
LSF0108PWR expands the directionless LSF pass-translation architecture to eight channels. It is useful when a full peripheral bus or GPIO bank crosses voltage domains but cannot tolerate a shared fixed direction control.
The eight channels increase bus density, but each line still depends on pull-up/source drive and capacitance. PCB routing, fan-out and external pull-up values therefore determine whether the system achieves the desired edge rate.
Compared with LSF0102, the main value is channel count and support for very low source-domain voltages in stated configurations, not a different buffered logic principle.
For related devices, see HKEQGOO’s Translators, Level Shifters category.
Technical Specifications
| Parameter | Verified Information |
|---|---|
| Manufacturer | Texas Instruments |
| Exact MPN | LSF0108PWR |
| Channels | 8 bidirectional channels |
| Direction | No DIR pin |
| Low-Side Domain | Supports low-voltage translation beginning around 0.65 V in stated configurations |
| High-Side Domain | Up to 5-V logic translation |
| Speed | Up to 100-MHz-class under low-capacitance stated conditions; load dependent |
| Enable | High impedance when EN is low |
| Use | GPIO, MDIO, PMBus, SMBus, SDIO, UART, I²C and similar interfaces |
| Exact Package / Packing | TSSOP (PW), 20 pins; 2000-piece large reel; −40°C to +125°C; marking LSF0108 |
| Manufacturer Status | Active / Production |
| Part Marking | LSF0108 |
Functional Highlights
Eight channels translate an entire control/data bank without DIR logic
Mixed-direction GPIO or memory/control buses can cross domains through one device.
Very-low-voltage source domains support modern cores
The LSF0108 family can bridge sub-1-V logic domains upward when the bias network is designed correctly.
Design Considerations
- Check every line’s RC load rather than applying one headline frequency to the whole bus.
- Use external pull-ups appropriate to open-drain/bidirectional requirements.
- Keep EN/bias sequencing deterministic during power-domain startup.
Product Status and Exact Order Code
Texas Instruments/source evidence identifies LSF0108PWR as Active / Production; TSSOP (PW), 20 pins; 2000-piece large tape and reel; −40°C to +125°C; marking LSF0108.
Related Engineering Resources
Quality & Verification Support
Third-party inspection or testing can be arranged according to customer requirements. Testing fees are borne by the buyer. Additional verification requirements can be discussed before shipment. After an order is placed, physical product, label, packaging, and Date Code photos may be provided where appropriate.
Request a Quote
To request a quotation, provide the manufacturer part number, required quantity, destination, target Date Code if applicable, and any testing or inspection requirements.
