Key Selection Information
| Selection Parameter | Confirmed Information |
|---|---|
| Function | 8-bit serial-in shift register plus 8-bit storage/output register |
| Clocks | Separate SRCLK and RCLK |
| Clears | Independent direct clears for shift and storage registers |
| Cascade | QH serial output |
| Output | Latched parallel outputs |
| Supply | 2 V to 6 V |
| Drive | ±6 mA at 5 V stated feature |
| Exact Package / Packing | SOIC (D), 16 pins; 2500-piece large tape and reel |
Product Overview
SN74HC594DR lets firmware shift a new word into an internal register without changing the external outputs, then transfer all eight bits to the storage register together with RCLK. This avoids the ripple-state behavior of HC164.
The defining difference versus the more common HC595 is control structure: HC594 provides independent direct clears for both shift and storage registers, while HC595 adds 3-state output enable. If the board needs a hard clear of the latched outputs, HC594’s RCLR is valuable; if it needs high-impedance outputs, HC595 is the more natural fit.
The DR exact code uses a 2500-piece SOIC reel, favoring visible leads and straightforward rework.
For related devices, see HKEQGOO’s Shift Registers category.
Technical Specifications
| Parameter | Verified Information |
|---|---|
| Manufacturer | Texas Instruments |
| Exact MPN | SN74HC594DR |
| Function | 8-bit serial-in shift register plus 8-bit storage/output register |
| Clocks | Separate SRCLK and RCLK |
| Clears | Independent direct clears for shift and storage registers |
| Cascade | QH serial output |
| Output | Latched parallel outputs |
| Supply | 2 V to 6 V |
| Drive | ±6 mA at 5 V stated feature |
| Exact Package / Packing | SOIC (D), 16 pins; 2500-piece large tape and reel |
| Manufacturer Status | Active / Production |
| Part Marking | HC594 |
Functional Highlights
Independent storage-register clear provides a hardware all-low output path
Outputs can be forced clear without shifting a zero word. That can simplify fault/reset circuitry for control lines.
Separate shift and latch clocks create atomic output updates
Serial transfer occurs invisibly until RCLK, preventing intermediate shift patterns from reaching the loads.
Design Considerations
- Use RCLR/SRCLR deliberately in reset/fault logic; their asynchronous behavior can override clocked data.
- If outputs must disconnect rather than drive low, HC594 does not replace a 3-state HC595 function.
- Keep shift/latch clock edges separated per timing requirements when updating at high speed.
Product Status and Exact Order Code
Manufacturer status: Active / Production
Texas Instruments lists SN74HC594DR as Active / Production; SOIC (D), 16 pins; 2500-piece large tape and reel; Level-1-260C-UNLIM; −40°C to +125°C; marking HC594.
Related Engineering Resources
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